The full specifications of AMD’s EPYC 9004 Genoa-X & Bergamo CPUs featuring the latest Zen 4 V-Cache & Zen 4C cores have been leaked by YuuKi_AnS. The leaker previously share the specs for the standard Zen 4 parts and now, we get to see what the specialized Zen 4 families would offer.
AMD EPYC 9004 CPU Family Specs & SKUs Leak Out, EPYC Genoa-X With Zen 4 3D V-Cache & Bergamo With Zen 4C Cores
The AMD Zen 4 lineup will be split into three families, the standard Zen 4 for EPYC Genoa, the Compute Density-Optimized Zen 4C for EPYC Bergamo, and the Cache-Optimized Zen 4 V-Cache within the EPYC Genoa-X series. Furthermore, the lineup will be featuring a cost-optimized and entry-level server offering known as EPYC Siena which will feature the same Zen 4 cores but on an entirely new platform known as SP6 which will once again focus on optimizing TCO compared to SP5. The lineup will be branded under the EPYC 8004 family.
As for the leak, YuuKi_AnS was the first to leak the specifications of AMD’s entire EPYC 9004 Genoa lineup and now he has leaked the Zen 4C powered EPYC Bergamo & Zen 4 V-Cache-powered EPYC Genoa-X chips too. Starting with the EPYC Bergamo parts, the leaker has listed two chips, the EPYC 9734 and the EPYC 9754.
The chips offer 112/224 & 128/256 cores & threads, respectively, and both rock total of 256 MB cache (L3). The CPU clock speeds are rated between 2.0 – 2.15 GHz while the TDPs have been rated at 340W for the 112 Core and 360W for the 128 core SKU. Each CPU will feature 8 Zen 4C CCDs and each CCD would pack 16 cores. The CPUs come with 256 MB of cache or 32 MB of L3 cache per CCD.
Moving over to the AMD EPYC Genoa-X SKUs, the leaker has listed four CPU models. Starting at the top, we have the EPYC 9684X which features 96 cores and 192 threads with a TDP of 400W, an EPYC 9384X with 32 cores and 64 threads rated at 320W, the EPYC 9284X with 24 cores and 48 threads at 320W too, and lastly, we have the EPYC 9148X with 16 cores and 32 threads, also rated at 320W.
The L3 cache configurations for these four variants will be 1152 MB for the 96 core, 384 MB for the 32 core, 256 MB for the 24 core, and 192 MB for the 16 core variants. The clock speed data is not available for the Genoa-X parts but the leaker has listed down the product positioning for each SKU which makes it easier for us to understand the core market for each chip.
AMD EPYC Genoa-X “Zen 4 3D V-Cache” & Bergamo “Zen 4C” CPU Family Leak (Credits: YuuKi_AnS):
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AMD EPYC Bergamo CPUs – 4nm Zen 4 & Up To 128 Cores
The EPYC Bergamo chips will be featuring up to 128 cores and will be aiming at the HBM-powered Xeon chips along with server products from Apple and Google with higher core counts (ARM architecture). Both Genoa and Bergamo will utilize the same SP5 socket and the main difference is that Genoa is optimized for higher clocks while Bergamo is optimized around higher-throughput workloads.
AMD EPYC Genoa-X CPUs – 5nm Zen 4 & Up To 1.152 GB L3 Cache
The Genoa-X CPUs are expected to hit production by end of Q3 / early Q1 2023 and will launch around mid of 2023. They will feature a similar design methodology as the Milan-X chips with 3D V-Cache as ‘Large L3’ is a highlighted feature of the lineup. While Milan-X features up to 768 MB of L3 cache, Genoa-X CPUs will feature over 1 GB of L3 cache while rocking the same 96 cores based on the Zen 4 design. So in total, SP5 will end up with three EPYC families.
The standard Zen 4 lineup will feature up to 12 CCDs, 96 cores, and 192 threads. Each CCD will come with 32 MB of L3 cache and 1 MB of L2 cache per core. The EPYC 9004 CPUs will pack the latest instructions such as BFLOAT16, VNNU, AVX-512 (256b data-path), addressable memory of 57b/52b, and an updated IOD with an internal AMD Gen3 Infinity Fabric architecture with higher bandwidth (die-to-die interconnect).
The platform will feature support for 12 DDR5 channels with up to 4800 Mbps DIMM support and including options for 2,4,6,8,10,12 interleaving. Both RDIMM & 3DS RDIMM will be supported with 2 DIMMs per channel for up to 6 TB/ capacities per socket (using 256 GB 3DS RDIMMs). There will be 160 gen 5 lanes available on the 2P platform, 12 PCIe Gen 3 lanes (8 lanes on 1P), 32 SATA lanes, 64 IO lanes supporting CXL 1.1+ with bifurcations down to x4 and SDCI (Smart Data Cache Injection).
‘AMD’s EPYC 9000 “Genoa” CPU lineup for servers is going to offer a huge uplift in performance. We have already seen a partial 128 core / 256 thread configuration defeating all of the current-gen server chips so a 192-core and 384-thread dual-socket configuration is going to shatter some world records for sure. The AMD EPYC 9000 Genoa CPU lineup is expected to enter servers in the next few months.
AMD EPYC 9000 Genoa CPU SKUs ‘Preliminary’ Specs:
| CPU Name | Architecture | Family | Total CCDs | Cores / Threads | L3 Cache | Base / Max Clocks | TDP | CPU Positioning |
|---|---|---|---|---|---|---|---|---|
| EPYC 9754 | 4nm Zen 4C | Bergamo | 8 | 128/256 | 256 MB | 2.05-3.20 GHz | 360W (320-400W) | Density Optimized |
| EPYC 9734 | 4nm Zen 4C | Bergamo | 8 | 112/224 | 256 MB | 2.00 – 3.20 GHz | 320W (320-400W) | Density Optimized |
| EPYC 9184X | 5nm Zen 4 V-Cache | Genoa-X | 12 | 96/192 | 1152 MB | TBD | 400W | Cache Optimized |
| EPYC 9384X | 5nm Zen 4 V-Cache | Genoa-X | 4-8 | 32/64 | 384-768 MB | TBD | 320W | Cache Optimized |
| EPYC 9284X | 5nm Zen 4 V-Cache | Genoa-X | 4-8 | 24/48 | 384-768 MB | TBD | 320W | Cache Optimized |
| EPYC 9184X | 5nm Zen 4 V-Cache | Genoa-X | 4-8 | 16/32 | 384-768 MB | TBD | 320W | Cache Optimized |
| EPYC 9664 | 5nm Zen 4 | Genoa | 12 | 96/192 | 384 MB | 2.25-3.80 GHz | 400W (320-400W) | Density Optimized |
| EPYC 9654P | 5nm Zen 4 | Genoa | 12 | 96/192 | 384 MB | 2.05 -3.70 GHz | 360W (320-400W) | Density Optimized (Single-Socket) |
| EPYC 9654 | 5nm Zen 4 | Genoa | 12 | 96/192 | 384 MB | 2.05 – 3.70 GHz | 360W (320-400W) | Density Optimized |
| EPYC 9634 | 5nm Zen 4 | Genoa | 8 | 84/168 | 384 MB | 2.00-3.70 GHz | 290W (320-400W) | Density Optimized |
| EPYC 9554P | 5nm Zen 4 | Genoa | 8 | 64/128 | 256 MB | 2.70-3.70 GHz | 360W (320-400W) | Density + Frequency |
| EPYC 9554 | 5nm Zen 4 | Genoa | 8 | 64/128 | 256 MB | 2.70-3.70 GHz | 360W (320-400W) | Density + Frequency |
| EPYC 9534 | 5nm Zen 4 | Genoa | 8 | 64/128 | 256 MB | 2.30 – 3.70 GHz | 280W (240-280W) | Balanced |
| EPYC 9454P | 5nm Zen 4 | Genoa | 8 | 48/96 | 256 MB | 2.25-2.35 GHz | 280W (240-280W) | Balanced |
| EPYC 9454 | 5nm Zen 4 | Genoa | 8 | 48/96 | 256 MB | 2.25-2.35 GHz | 280W (240-280W) | Balanced |
| EPYC 9354P | 5nm Zen 4 | Genoa | 8 | 32/64 | 256 MB | 2.75-3.70 GHz | 280W (240-280W) | Core Strength |
| EPYC 9354 | 5nm Zen 4 | Genoa | 8 | 32/64 | 256 MB | 2.75-3.70 GHz | 280W (240-280W) | Core Strength |
| EPYC 9334 | 5nm Zen 4 | Genoa | 4 | 32/64 | 128 MB | 2.50-3.70 GHz | 210W (200-240W) | Balanced |
| EPYC 9254 | 5nm Zen 4 | Genoa | 4 | 24/48 | 128 MB | 2.40-3.70 GHz | 200W (200-240W) | Balanced |
| EPYC 9224 | 5nm Zen 4 | Genoa | 4 | 24/48 | 64 MB | 2.15-3.70 GHz | 200W (200-240W) | Cost Optimized |
| EPYC 9124 | 5nm Zen 4 | Genoa | 4 | 16/32 | 64 MB | 2.60-3.70 GHz | 200W (200-240W) | Cost Optimized |
| EPYC 9474F | 5nm Zen 4 | Genoa | 8 | 48/96 | 256 MB | 3.60-4.00 GHz+ | 360W (320-400W) | Frequency Optimized |
| EPYC 9374F | 5nm Zen 4 | Genoa | 8 | 32/64 | 256 MB | 3.40-4.00 GHz+ | 320W (320-400W) | Frequency Optimized |
| EPYC 9274F | 5nm Zen 4 | Genoa | 8 | 24/48 | 256 MB | 3.30-4.00 GHz+ | 320W (320-400W) | Frequency Optimized |
| EPYC 9174F | 5nm Zen 4 | Genoa | 8 | 16/32 | 256 MB | 3.20-4.00 GHz+ | 320W (320-400W) | Frequency Optimized |
The post AMD EPYC Genoa-X & Bergamo CPU Lineup Leaked – Zen 4C & Zen 4 V-Cache Chips With Up To 128 Cores, 16 Cores Per CCD, 4 GHz+ Clocks & 400W TDP by Hassan Mujtaba appeared first on Wccftech.
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