AMD’s next-generation Strix Point Ryzen APUs are rumored to utilize a hybrid core architecture approach which will combine two Zen IPs on the same package. The rumor comes from Twitter user, Broly_X1, who points out the hybrid design of AMD’s 7th Gen Zen-powered APUs.
AMD Strix Point Ryzen APUs To Feature Next-Gen Hybrid Architecture Approach, Rumored To Combine Zen 5 & Zen 4 Cores on 3nm
We heard several rumors about the AMD Strix Point APUs back in April. Essentially, these next-gen Ryzen APUs will be packing a hybrid core architecture and will feature the 3nm process node. Now there are brand new rumors who further dive into the details regarding the hybrid approach & tell us what we might get when these chips release.
Strix point adopts the hybrid architecture of zen5+zen4 and introduces a new cache. The desktop version does not know if this mode will be adopted, but it is certain that the same 3nm will be used.
— vegeta (@Broly_X1) May 25, 2021
Ah yes. Indeed there will be a L4 cache in Zen5 Strix Point which I expect to work as SLC (System Level Cache).
The littles are called Zen4D cores and are based on Zen4 cores.— Bullsh1t_Buster (@Bullsh1t_buster) May 25, 2021
According to the rumor, AMD’s Strix Point Ryzen APUs will be offering a hybrid architecture that is made by combining two Zen core IPs. The main cores would be based on the Zen 5 architecture & the rest of the cores will rely on the Zen 4 architecture. The Zen 4 architecture is planned for launch sometime in 2022 while these APUs are expected to debut around 2024.
It is stated that both Zen 5 and Zen 4 cores for Strix Point APUs will be based on the 3nm process node. What’s interesting is that Zen 4 is initially fabricated on the 5nm process node so we might be looking at an enhanced version of the architecture. The little Zen 4 cores are said to be called Zen 4D. The AMD Strix Point Ryzen APUs are expected to feature 8 large Zen 5 cores and 4 smaller cores
There’s also a new L4 cache system to be incorporated on AMD Strix Point APUs which is going to work as a system-level cache. The rumor states that the hybrid approach could only be a mobile-specific launch while desktop chips will rely on the same monolithic design. It will be really interesting to see whether AMD uses its X3D packaging technology for Strix Point APUs as it does sound like the next logical path in the development of MCM APUs.
So far, AMD APUs have been offering a monolithic design with all IPs (CPU/GPU/IO) onboard the same die. Technologies such as Infinity Cache and GPU IPs such as RDNA 3 are also expected to debut with Strix Point Ryzen APUs. Once again, this is all just a rumor but we can definitely expect lots of interesting developments in the APU segment in the years to come.
AMD Zen CPU / APU Roadmap:
| Zen Architecture | Zen 1 | Zen+ | Zen 2 | Zen 3 | Zen 3+ | Zen 4 | Zen 5 |
|---|---|---|---|---|---|---|---|
| Process Node | 14nm | 12nm | 7nm | 7nm | 6nm? | 5nm | 3nm? |
| Server | EPYC Naples (1st Gen) | N/A | EPYC Rome (2nd Gen) | EPYC Milan (3rd Gen) | N/A | EPYC Genoa (4th Gen) | TBA |
| High-End Desktop | Ryzen Threadripper 1000 (White Haven) | Ryzen Threadripper 2000 (Coflax) | Ryzen Threadripper 3000 (Castle Peak) | Ryzen Threadripper 5000 (Chagal) | N/A | Ryzen Threadripper 6000 (TBA) | TBA |
| Mainstream Desktop CPUs | Ryzen 1000 (Summit Ridge) | Ryzen 2000 (Pinnacle Ridge) | Ryzen 3000 (Matisse) | Ryzen 5000 (Vermeer) | Ryzen 6000 (Warhol / Cancelled) | Ryzen 6000 (Raphael) | TBA |
| Mainstream Desktop . Notebook APU | Ryzen 2000 (Raven Ridge) | Ryzen 3000 (Picasso) | Ryzen 4000 (Renoir) Ryzen 5000 (Lucienne) |
Ryzen 5000 (Cezanne) Ryzen 6000 (Barcelo) |
Ryzen 6000 (Rembrandt) | Ryzen 7000 (Phoenix) | Ryzen 8000 (Strix Point) |
| Low-Power Mobile | N/A | N/A | Ryzen 5000 (Van Gogh) Ryzen 6000 (Dragon Crest) |
TBA | TBA | TBA | TBA |
The post AMD’s Next-Gen Strix Point Ryzen APUs Feature Hybrid 3nm Zen 5 & Zen 4 CPU Cores, Alleges Rumor by Hassan Mujtaba appeared first on Wccftech.
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